for (n <- 0 to numWays - 1) { val req_pc_reg = RegEnable(io.req_pc.bits, 0.U.asTypeOf(io.req_pc.bits), io.req_pc.valid) val req_pc_reg_lower = Cat(0.U(1.W), req_pc_reg(instOffsetBits + log2Ceil(PredictWidth) - 1, instOffsetBits)) val ftbEntryEndLowerwithCarry = Cat(read_entries(n).carry, read_entries(n).pftAddr) val fallThroughErr = req_pc_reg_lower + PredictWidth.U >= ftbEntryEndLowerwithCarry when(read_entries(n).valid && total_hits(n) && io.s1_fire) { assert(fallThroughErr, s"FTB read sram entry in way${n} fallThrough address error!") } }
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